Texas Instruments /MSP432P401R /DMA /DMA_INT0_SRCFLG

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Interpret as DMA_INT0_SRCFLG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0)CH0 0 (CH1)CH1 0 (CH2)CH2 0 (CH3)CH3 0 (CH4)CH4 0 (CH5)CH5 0 (CH6)CH6 0 (CH7)CH7 0 (CH8)CH8 0 (CH9)CH9 0 (CH10)CH10 0 (CH11)CH11 0 (CH12)CH12 0 (CH13)CH13 0 (CH14)CH14 0 (CH15)CH15 0 (CH16)CH16 0 (CH17)CH17 0 (CH18)CH18 0 (CH19)CH19 0 (CH20)CH20 0 (CH21)CH21 0 (CH22)CH22 0 (CH23)CH23 0 (CH24)CH24 0 (CH25)CH25 0 (CH26)CH26 0 (CH27)CH27 0 (CH28)CH28 0 (CH29)CH29 0 (CH30)CH30 0 (CH31)CH31

Description

Interrupt 0 Source Channel Flag Register

Fields

CH0

Channel 0 was the source of DMA_INT0

CH1

Channel 1 was the source of DMA_INT0

CH2

Channel 2 was the source of DMA_INT0

CH3

Channel 3 was the source of DMA_INT0

CH4

Channel 4 was the source of DMA_INT0

CH5

Channel 5 was the source of DMA_INT0

CH6

Channel 6 was the source of DMA_INT0

CH7

Channel 7 was the source of DMA_INT0

CH8

Channel 8 was the source of DMA_INT0

CH9

Channel 9 was the source of DMA_INT0

CH10

Channel 10 was the source of DMA_INT0

CH11

Channel 11 was the source of DMA_INT0

CH12

Channel 12 was the source of DMA_INT0

CH13

Channel 13 was the source of DMA_INT0

CH14

Channel 14 was the source of DMA_INT0

CH15

Channel 15 was the source of DMA_INT0

CH16

Channel 16 was the source of DMA_INT0

CH17

Channel 17 was the source of DMA_INT0

CH18

Channel 18 was the source of DMA_INT0

CH19

Channel 19 was the source of DMA_INT0

CH20

Channel 20 was the source of DMA_INT0

CH21

Channel 21 was the source of DMA_INT0

CH22

Channel 22 was the source of DMA_INT0

CH23

Channel 23 was the source of DMA_INT0

CH24

Channel 24 was the source of DMA_INT0

CH25

Channel 25 was the source of DMA_INT0

CH26

Channel 26 was the source of DMA_INT0

CH27

Channel 27 was the source of DMA_INT0

CH28

Channel 28 was the source of DMA_INT0

CH29

Channel 29 was the source of DMA_INT0

CH30

Channel 30 was the source of DMA_INT0

CH31

Channel 31 was the source of DMA_INT0

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