Interrupt 0 Source Channel Flag Register
CH0 | Channel 0 was the source of DMA_INT0 |
CH1 | Channel 1 was the source of DMA_INT0 |
CH2 | Channel 2 was the source of DMA_INT0 |
CH3 | Channel 3 was the source of DMA_INT0 |
CH4 | Channel 4 was the source of DMA_INT0 |
CH5 | Channel 5 was the source of DMA_INT0 |
CH6 | Channel 6 was the source of DMA_INT0 |
CH7 | Channel 7 was the source of DMA_INT0 |
CH8 | Channel 8 was the source of DMA_INT0 |
CH9 | Channel 9 was the source of DMA_INT0 |
CH10 | Channel 10 was the source of DMA_INT0 |
CH11 | Channel 11 was the source of DMA_INT0 |
CH12 | Channel 12 was the source of DMA_INT0 |
CH13 | Channel 13 was the source of DMA_INT0 |
CH14 | Channel 14 was the source of DMA_INT0 |
CH15 | Channel 15 was the source of DMA_INT0 |
CH16 | Channel 16 was the source of DMA_INT0 |
CH17 | Channel 17 was the source of DMA_INT0 |
CH18 | Channel 18 was the source of DMA_INT0 |
CH19 | Channel 19 was the source of DMA_INT0 |
CH20 | Channel 20 was the source of DMA_INT0 |
CH21 | Channel 21 was the source of DMA_INT0 |
CH22 | Channel 22 was the source of DMA_INT0 |
CH23 | Channel 23 was the source of DMA_INT0 |
CH24 | Channel 24 was the source of DMA_INT0 |
CH25 | Channel 25 was the source of DMA_INT0 |
CH26 | Channel 26 was the source of DMA_INT0 |
CH27 | Channel 27 was the source of DMA_INT0 |
CH28 | Channel 28 was the source of DMA_INT0 |
CH29 | Channel 29 was the source of DMA_INT0 |
CH30 | Channel 30 was the source of DMA_INT0 |
CH31 | Channel 31 was the source of DMA_INT0 |